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Sheet 13 - Increment Decrement Selection Logic #28

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opened 2026-03-16 21:56:32 -05:00 by aidanbrzezinski · 0 comments
aidanbrzezinski commented 2026-03-16 21:56:32 -05:00
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Place 74HC163 digit select counter 0-5 wraps at 6. Place 74HC138 3-to-8 decoder to enable one counter pair at a time. Gate 1Hz clock LOW via AND gate when ADJUSTING. Wire UP/DOWN pulses to selected 74HC193 on time and date sheets. Never assert UP and DOWN simultaneously.

Place 74HC163 digit select counter 0-5 wraps at 6. Place 74HC138 3-to-8 decoder to enable one counter pair at a time. Gate 1Hz clock LOW via AND gate when ADJUSTING. Wire UP/DOWN pulses to selected 74HC193 on time and date sheets. Never assert UP and DOWN simultaneously.
aidanbrzezinski added this to the DRAFT milestone 2026-03-16 21:56:32 -05:00
aidanbrzezinski added the DRAFTSchematic labels 2026-03-16 21:56:32 -05:00
aidanbrzezinski added this to the Nixie Tube Clock project 2026-03-16 21:57:45 -05:00
aidanbrzezinski changed title from Sheet 12 - Increment Decrement Selection Logic to Sheet 13 - Increment Decrement Selection Logic 2026-03-19 20:46:56 -05:00
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Reference: aidanbrzezinski/Nixie_Tube_Clock#28
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